As discussed in class, modern CPUs implement multiple levels of cache. Suppose a processor has three levels of cache (L1, L2, L3) and main memory. In this system, the L1 cache access time is T(L1) = 5ns, the L2 cache access time is T(L2) = 10ns, the L3 cache access time is T(L3) = 30ns, and the main memory access time is T(M) = 60ns. Let us also define the cache hit ratios as H(L1), H(L2) and H(L3). Suppose 60% of the references are in the L1 cache. Of those references not in L1 cache, 75% are in L2 cache. Of those references not in L2 cache, 85% are in L3 cache. Of those references not in L3 cache, 100% are in main memory. First write the equation for EAT using the variables defined. Then substitute the given values into the equation for this situation. You do not need to solve the equation.