Assignment Objective This assignment exposes you to the combinational logic design procedure. You will go over all the steps of digital design from specification to verification. Problem Statement Design a combinational logic circuit that accepts a 4-bit binary number and produces the number of is in the input (in binary). For example, if the input is 0101 then the output is 10, and if the input is 1101 then the output is 11. Go over ALL the five steps of the digital design process to implement this circuit. In the technology mapping step, you must implement your circuit using only inverters and NAND gates. In the verification step, you must use Verilog simulation to validate that your circuit works as expected. You must show the waveform of all the possible inputs and their corresponding outputs. Grading Criteria The total score for this homework is 40 points. You must submit two files (uncompressed), each file by itself. Submission of one text file containing your Verilog module and its testbench (5 points) Submission of a single Word document containing the following (33 points) o Cover page containing your name, id, course information, and date. Must be the first page and must be a separate page by itself. (2 points) Details of the FIVE design steps and your decisions/choices/findings (31 points) Specification step: 2 points Formulation step: 2 points Logic optimization step: 6 points Technology mapping step: 6 points Verification step: 10 points for the module and 5 points for the testbench A waveform showing all the signals with all the possible input patterns and their outputs (4 points) The TWO files are not compressed (2 points)