Assume a $2-$way set associative data cache with $(1)2$ cache sets, $(2)4$ words $(16$ bytes$)$ per block $($line$),$ and $(3)$ an LRU cache block replacement policy. For data writes, the data cache employs a write$-$back and write$-$allocate policy.

IMPORTANT: As you did for MP$8$ data cache exercises, simulate the data cache with the provided memory reference trace by $(1)$ coping the following data memory reference table into your answer box, and $(2)$ filling the remaining table with the appropriate data cache information for each memory reference.

$\backslash$table$[[$R$/$W$,\backslash$table$[[$Memory$],[$Address$]],$Tag in hex,$\backslash$table$[[$Index$]],\backslash$table$[[$Byte$],[$Offset in$],[$hex$]],$Result,# Memref$],[$R$,$Oxf$1210,,,,,],[$R$,$Ox$10124$c$,,,,,],[$W$,$Ox$101244,,,,,],[$R$,$Oxf$1218,,,,,],[$R$,,,,,,],[$Oxf$121$c$,,,,,,]]$