Assume that our MIPS processor has six $32$ bit registers and eight memory locations. Each memory

location holds $32$ bits of data. The naming convention for the registers and the memory are shown in

the table below.

Table $1$: Register values

Table $2$: Memory values

a$.$ Now, let us assume that an array A with $3$ integer $($word$)$ elements is stored starting from memory

address zero and another array B with $4$ integer $($word$)$ elements is at stored starting from

memory address $16.$ That is$,$ address of $A[0]$ is $0,$ while the address of $B[0]$ is $16.$ With this

information, fill the register value and memory tables for the following sequence of instructions.

$I1,I2,$ etc denote the instruction number while LABEL denotes the target for the branch, if taken.

I$1$ lw R$3,-4($R$1)$

I$2$ : Iw R$4,0($R$1)$

I$3$ beq R$3,$ R$4,$ Label

I$4$: sw R$5,0($R$2)$

I$5$: j Exit

Label I$6$: sw R$6,0($R$2)$

Exit I$7$ : $...$

b$.$ What is the equivalent $C$ code for the five instructions from part $($a$).$