Assume that we want to include a register$-$memory addition instruction which does the following:

addm # Mem$[$R$($rs$)]$ R$($rd$)+$ Mem$[$R$($rt$)]$

It is possible to include addm in a multicycle processor by modifying the datapath and control unit as

discussed in class and given to you in the attached sheet $($Diagram for Q$4).$ Mark on the diagram the

changes$/$additions in connections and$/$or components of the data path for implementation of addm. Your

implementation of addm should take minimum states for execution. Draw the finite state machine

diagram for the addm instruction.