Question: Assume you have a processor with a 16KB, 4-way set-associative (i.e., each set consists of 4 blocks) data cache with 32-byte blocks. a) How many
Assume you have a processor with a 16KB, 4-way set-associative (i.e., each set consists of 4 blocks) data cache with 32-byte blocks.
a) How many total blocks are in the cache? How many sets are there?
b) Assuming that memory is byte addressable and addresses are 35-bits long, give the number of bits required for each of the following fields: cache tag, index, and byte offset.
c) What is the total size of the cache, including the valid, tag and data fields? Give an exact answer, in either bits or bytes.
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