b. [10] The following figure shows the single-cycle processor implementation of the nine- instruction MIPS ISA (1w, sw, beq, add, sub, and, or, slt, j). Assume in a given cycle, the CPU is executing instruction ".LW $8, $9, +8", and the value of the PC register is 0x00400000. (haa) left 2 28 Instruction [25-0] Jum 26 PC +4 [31-28] Add ALU Add result 4 RegDst Jump Shift left 2 MemRead MemtoRe Instruction [31-26 Control ALUO MemWrite ALUSrc RegWrite Instruction [25-21Read Read address register 1 Read PC Instruction [20-16Read data 1 Zero ALU ALU result Instruction register 2 31-0] Address Read data Read Instruction Instruction [15-111registerda memory UI I Write data Registers Write Data data memory Instruction [15-0] 16 Sign 32 ALU control extend Instruction [5-0 Also assume that register $8 stores 0x00001000 and register $9 stores 0x00001000. What is the value of the following signals? For an integer value, you may use either decimal or hex b. [10] The following figure shows the single-cycle processor implementation of the nine- instruction MIPS ISA (1w, sw, beq, add, sub, and, or, slt, j). Assume in a given cycle, the CPU is executing instruction ".LW $8, $9, +8", and the value of the PC register is 0x00400000. (haa) left 2 28 Instruction [25-0] Jum 26 PC +4 [31-28] Add ALU Add result 4 RegDst Jump Shift left 2 MemRead MemtoRe Instruction [31-26 Control ALUO MemWrite ALUSrc RegWrite Instruction [25-21Read Read address register 1 Read PC Instruction [20-16Read data 1 Zero ALU ALU result Instruction register 2 31-0] Address Read data Read Instruction Instruction [15-111registerda memory UI I Write data Registers Write Data data memory Instruction [15-0] 16 Sign 32 ALU control extend Instruction [5-0 Also assume that register $8 stores 0x00001000 and register $9 stores 0x00001000. What is the value of the following signals? For an integer value, you may use either decimal or hex