b. [10] The following figure shows the single-cycle processor implementation of the nine- instruction MIPS ISA (lw, sw, beg, add, sub, and, or, slt, j) Assume in a given cycle, the CPU is executing instruction" LW$8, 9. +8", and the value of the PC register is 0x00400000 Also assume that register S8 stores 0x00001000 and register S9 stores 0x00001000. What is the value of the following signals? For an integer value, you may use either decimal or hex nitials: Branch ALUSrc ALUOpl2] MemRead MemWrite RegWrite RegDst MemtoReg Jump address Branch target PC register input Rcad register l Read register 2 Read data Read data 2 Sign-extend output Zero ALU result b. [10] The following figure shows the single-cycle processor implementation of the nine- instruction MIPS ISA (lw, sw, beg, add, sub, and, or, slt, j) Assume in a given cycle, the CPU is executing instruction" LW$8, 9. +8", and the value of the PC register is 0x00400000 Also assume that register S8 stores 0x00001000 and register S9 stores 0x00001000. What is the value of the following signals? For an integer value, you may use either decimal or hex nitials: Branch ALUSrc ALUOpl2] MemRead MemWrite RegWrite RegDst MemtoReg Jump address Branch target PC register input Rcad register l Read register 2 Read data Read data 2 Sign-extend output Zero ALU result