$($b$)$ Another architect in the same team is focusing on memory accesses in this architecture and

developing a new type of cache$-$like structure. This on$-$chip structure, called WNC $($Who Needs

Cache?$),$ is like L$1$ cache but is managed entirely in software $($i$.$e$.,$ by program code or compiler$),$ and

our architect is considering substituting WNC for the L$1$ cache. Explain what type of ISA support is

needed to use WNC $($recall that conventional L$1$ caches are entirely managed in hardware, i$.$e$.,$ data

movements in and out of L$1$ are decided by hardware based on data access patterns$).$