Below is a list of byte addressable $32-$bit memory address references. The addresses aregiven in hexadecimal.

$003,0$B$4,02$B$,002,0$BF$,05$A$,$ OBE, $00$C$,0$B$5,02$C$,0$BA$,$ OFD The processor access the dala listed above sequentially for one time. Show the finalcache contents for a three$-$way set associative cache with two$-$byte blocks and a totalsize of $24$ bytes. Use LRU replacement. What is the hit and miss rate for the dataaccess? The cache is considered empty initially. Repeat the one time sequential access with the fully associative cache with two$-$byteblocks and total size of $24$ byte. Use LRU replacement. Show the final cache contentsand what is the hit and miss rate for the data access? The cache is considered emptyinitially. $/$s the final contents same as the final contents of set associative cache in $($a$)?$Why?