Carry-Select Adder: A 64-bit Adder is implemented using the Carry-Select Principle. a) Draw a diagram to demonstrate how the 64-bit circuit is built using 32-bit adders. Label all signal lines and indicates the number of bits per signal line. Suppose that the structure is applied recursively until the adders become 4-bit adders. Let Cn denote the cost of an N-bit adding circuit, and Dy denote the delay of an N-bit adding circuit. Let CMUX = $1 and DMX=1 ns be the cost and delay of a 2-channel single-bit multiplexer. Let C4 = $2 and D4 = 10 ns. b) Calculate the cost of the 64-bit adder. Show all calculations. (else -ve score) c) Calculate the propagation delay of the 64-bit adder. Show all calculations. (else -ve score) Neglect any simplifications arising from constants, 'l' and 'O'. Add64 Carry-Select Adder: A 64-bit Adder is implemented using the Carry-Select Principle. a) Draw a diagram to demonstrate how the 64-bit circuit is built using 32-bit adders. Label all signal lines and indicates the number of bits per signal line. Suppose that the structure is applied recursively until the adders become 4-bit adders. Let Cn denote the cost of an N-bit adding circuit, and Dy denote the delay of an N-bit adding circuit. Let CMUX = $1 and DMX=1 ns be the cost and delay of a 2-channel single-bit multiplexer. Let C4 = $2 and D4 = 10 ns. b) Calculate the cost of the 64-bit adder. Show all calculations. (else -ve score) c) Calculate the propagation delay of the 64-bit adder. Show all calculations. (else -ve score) Neglect any simplifications arising from constants, 'l' and 'O'. Add64