Chapter $6$

Given the input and clock transitions in Figure $1,$ indicate the output of a D device assuming:

$($a$)$ It is a negative edge$-$triggered flip$-$flop.

$($b$)$ It is a master$-$slave flip$-$flop.

$($c$)$ It is a positive edge$-$triggered flip$-$flop.

$($d$)$ It is a clocked latch. You may assume $0$ setup, hold, and propagation times.