CIRCULAR SHIFT RIGHT FOR OP1

convert the following VERILOG code from behavioral to STRUCTURAL

module Dflipflop(d,q,nq);

input d;

output q;

output nq;

wire w1,w2,w3;

not(w3,d);

nand n1(w1,d);

nand n2(w2,w3);

nand n3(q,w1,nq);

nand n4(nq,w2,q);

endmodule

module circularshiftleft(result,nq,y);

input [7:0] y;

output [7:0] result;

output [7:0] nq;

Dflipflop d1(y[7],result[0],nq[0]);

Dflipflop d2(y[0],result[1],nq[1]);

Dflipflop d3(y[1],result[2],nq[2]);

Dflipflop d4(y[2],result[3],nq[3]);

Dflipflop d5(y[3],result[4],nq[4]);

Dflipflop d6(y[4],result[5],nq[5]);

Dflipflop d7(y[5],result[6],nq[6]);

Dflipflop d8(y[6],result[7],nq[7]);

endmodule

module test;

reg [7:0] yt;

output [7:0] resultt,nqt;

circularshiftleft ccll(resultt,nqt,yt);

initial begin

yt=43;

#5 yt=21;

$display(resultt);

#20 yt=4;

$display (resultt);

#20 yt=3;

$display (resultt);

#20 $display (resultt);

#100 $finish;

end

endmodule

**CIRCULAR SHIFT LEFT**