Class Exercise 20-3- Multi-Cycle ARM Datapath For the following assembly code, determine contents of the non-architectural registers of the datapath as well as the PC register and registers RO, R1, and R2 for each step (clock cycle) needed to process each instruction. Use the table on the following page to record your answers Assume the following Initialization: RO 00001000, R100000000, R2 00000020, PC 00000000, MEM[000012DC] 00000030 Assembly Code: Registers to track: LDR R1, [R0, #0x2DC] SUBS R1, R1, R2 STR R1, [RO, #0X2Eoj BNE DONE AND R1, R1, R2 PC Instr RO R1 R2 WriteData ALUOut Data Class Exercise 20-3- Multi-Cycle ARM Datapath For the following assembly code, determine contents of the non-architectural registers of the datapath as well as the PC register and registers RO, R1, and R2 for each step (clock cycle) needed to process each instruction. Use the table on the following page to record your answers Assume the following Initialization: RO 00001000, R100000000, R2 00000020, PC 00000000, MEM[000012DC] 00000030 Assembly Code: Registers to track: LDR R1, [R0, #0x2DC] SUBS R1, R1, R2 STR R1, [RO, #0X2Eoj BNE DONE AND R1, R1, R2 PC Instr RO R1 R2 WriteData ALUOut Data