Computer Architecture

Average memory access time(AMAT)

Q1: Assume

the HitTime to the L1-cache is 1ns,

the MissRate to the L1 is 1%,

the HitTime to the L2 cache is 10ns,

the MissRate to the L2 is 20%,

the MissPenalty for the L2 cache is 100ns.

Then what is the average memory access time (AMAT)?

Q2: Suppose that you have an interleaved memory with 8 memory banks and that L2 Cache blocks are 64B and the bus width is 64bits=8B. If the main memory access time to read 64 bits is 20 cycles and the subsequent reads necessary to transfer a block occur every 4 cycles then what is the time necessary to read and transfer a full L2 block.

Q3: Explain what it means to do read hits under write misses.