Computer architecture PRELAB and PROCEDURE PLEASE!

CENG 3151 Lab for Computer Architecture Spring 2018 Lab 1: Combinational Circuit Design 1. Requirement A combinational network accepts a 3-bit binary number(r) and generates a binary number(y) equal to 3x+-9. Design, implement and test the below circuit using Xilinx: xo YO Y2. ?? Y4. y-3x + 9 Note: x,y: positive and integer 2. Pre-lab Draw the truth table, develop K-maps and derive the equation for the output (assume X0, X1, X2 inputs and YO - Y4 outputs) 3. Procedure a. Design the circuit in VHDL Inputs and outputs are std_logic. Behavioral architecture b. Synthesize your design and assure that there are no errors or warnings. c. Crcate a test bench for your code. .Remove references for clock process and stimulus process Develop test cases for all input combinations .Add 20 ns wait between test cases. d. Conduct testing. Check the output results with the truth table. TA will vcrify simulation results and check the report. e. 4. Deliverables Pre-lab works .VHDL program, testbench Simulation results (waveform, explanation)