computer architecture question

PCSrc Add 4 Add result Shift left 2 Read register 1 Read register 2 Write register Write data RegWrite ALUSrc4 ALU operation PRead Read data 1 address MemWrite MemtoReg Zero ALU ALU result Instruction Registers Read data 2 Read Address data Instruction memory Write Data data memory 32 Sign- MemRead 64 extend FIGURE 4.11 The simple datapath for the core LEGv8 architecture combines the elements required by different instruction classes. The components come from Figures 4.6,4.9, and 4.10. This datapath can execute the basic instructions (load-store register, ALU operations, and branches) in a single clock cycle. Just one additional multiplexor is needed to integrate branches. The support for unconditional branches will be added later