Computer Organization and Architecture. NEED CLEAR DATAPATHS and procedure!!!!.

Question 2: [CLO1-C1-PLOl] (20 marks) MomoReg Shift Add RegWrite Memberite Road Add 1 Register ReadAdd2 Data 1 Read Address + Data Memory Read Data write Addr Read Date 2 Wirita Data Write Data MemRead ALU contral overflow zero Instruction Memory Road Adress Instructo Sign Extend ALU 32 Reproduce a 32bit Single cycle MIPS Datapath that can support a new instruction called FRR. FRR is very similar to our basic LW instruction, but instead of using an offset in an immediate, we store it in a register. Reg[Srt] = Mem(Srs + Srt] This means we need to add two registers together and use the result to address memory for a read. As a design Engineer your task is to decide the components and control signals needed to get this to work. You are required to a) Make a clean Datapath for FRR instruction only, using Datapath components (12) b) Fill the control signal table given below c) Decide which instruction type (R. I, 1) can support this instruction, draw its template indicating number of bits for each field. Instruction Opcode Reg Write ALU Src Jump Mem Reg Mem Mem Branch To Dest Read Write Reg FRR