Computer science

Consider the following $4-$bit Left Shift Serial In Serial Out $($SISO$)$ register where Time is the clock cycle $($where $0$T is before the initial clock pulse $(1$T$)$ and $5$T is after the fifth clock pulse$).$ Please show the values for all bits up to $5$T$.$Data Preset: $0000($you may assume these are the bit values at $0$T$)$Data In: $1010($begin with the left$-$most Data In value$)$Edge Triggered: Rising