Question: Consider 256Kx8bits dynamic RAM chips where the access time is 1/2 (0.5) of the cycle time. Suggest a memory organization that will contain 4 megabytes,

Consider 256Kx8bits dynamic RAM chips where the access time is 1/2 (0.5) of the cycle time.

Suggest a memory organization that will contain 4 megabytes, will have a 32-bit data bus and that will yield one word (32-bits) every access time if words are read from consecutive memory locations. Please clearly explain your answer.

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