Question: Consider a 6 4 - bit computer featuring a simplified memory hierarchy. This hierarchy comprises a solitary cache and an unbounded backing memory. The cache

Consider a 64-bit computer featuring a simplified memory hierarchy. This
hierarchy comprises a solitary cache and an unbounded backing memory. The cache is defined by
the following attributes:
Direct-Mapped, Write-through, Write allocate.
Cache blocks are 8 words each.
The cache has 128 sets.
(a) Consider the provided code snippet in the C programming language intended for execution
on the previously described computer. Assume the following conditions: program instructions are
not stored in the cache, arrays are aligned with the cache (starting at the beginning of a cache
line), integers are 32 bits, and all other variables are exclusively stored in registers.
int N =32859; int
A[N];
for (int i =0; i < N; i +=2){
A[i]= A[i+1]; }
Determine the following:
(i) The number of cache misses.
(ii) The cache miss rate.
(iii) The type of cache misses that occur.
(b) Consider the following code fragment in the C programming language to be run on the
described computer. Assume that: program instructions are not stored in cache, arrays are cachealigned (the beginning of the array aligns with the beginning of a cache line), ints are 32 bits, and
all other variables are stored only in registers.
int N =32859; int
A[N]; int B[N];
for (int i =0; i < N; ++i){ B[i]= A[i];
}
Determine the following:
(i) The number of cache misses.
(ii) The cache miss rate.
(iii) The type of cache misses that occur.

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