Consider a cache for a system that does not support virtual memory (i.e. no paging and no translation). The byte-addressable address space consists of Z bytes, the cache has S sets, A ways, and a block size of K bytes. 3. Cache basics (9 pts) a) (3) If the degree of associativity increases 3x, S doubles, and cache capacity goes up by 12x, how many bits are in each of the tag, index and block offset fields, in terms of the S, A, and K parameters of the original cache? Bit length (tag) Bit length (index) Bit length (block offset) b) (6) For each of the following, list both of 1) which one of the "3 Cs" of cache misses is being addressed by the proposed change to a cache, and 2) what the dominant cost (negative considerations) of applying the proposed change is likely to be. Assume that any parameters not mentioned are not modified. i) Associativity doubles, number of sets halves li) Number of sets quadruples, associativity halves ii) Block size doubles, associativity halves Consider a cache for a system that does not support virtual memory (i.e. no paging and no translation). The byte-addressable address space consists of Z bytes, the cache has S sets, A ways, and a block size of K bytes. 3. Cache basics (9 pts) a) (3) If the degree of associativity increases 3x, S doubles, and cache capacity goes up by 12x, how many bits are in each of the tag, index and block offset fields, in terms of the S, A, and K parameters of the original cache? Bit length (tag) Bit length (index) Bit length (block offset) b) (6) For each of the following, list both of 1) which one of the "3 Cs" of cache misses is being addressed by the proposed change to a cache, and 2) what the dominant cost (negative considerations) of applying the proposed change is likely to be. Assume that any parameters not mentioned are not modified. i) Associativity doubles, number of sets halves li) Number of sets quadruples, associativity halves ii) Block size doubles, associativity halves