Consider a single-level cache with an access time of 2 ns, a line size of 64 bytes, and a hit ratio H = 0.94. Main memory uses a block transfer capability that has a first-word (4 bytes) access time of 40ns and an access time of 5ns for each word thereafter. What is the access time when there is a cache miss? Assume that the cache waits until the line has been fetched from main memory and then re-executes for a hit. Suppose that increasing the line size to 128 bytes increases the H to 0.97. Does this reduce the average memory access time? Consider a single-level cache with an access time of 2 ns, a line size of 64 bytes, and a hit ratio H = 0.94. Main memory uses a block transfer capability that has a first-word (4 bytes) access time of 40ns and an access time of 5ns for each word thereafter. What is the access time when there is a cache miss? Assume that the cache waits until the line has been fetched from main memory and then re-executes for a hit. Suppose that increasing the line size to 128 bytes increases the H to 0.97. Does this reduce the average memory access time