Consider an Acc$-$ISA CPU that executes the pseudo$-$code shown. Do the following:a$.$ Create a set of $8-$bit Acc$-$ISA instructions with $3-$bit op$-$codes and $5-$bit operands. Any of the variables A through C may be a negative $2\text{'}$s complement number.b$.$ Write an assembly program using your instruction set. Also assume that the code starts from memory address $0$ and increases by $1,$ and data starts from memory address $0$xx$1$F and decreases by $1.$c$.$ Manually assemble your assembly program and write instructions in binary and in hex. Assign op$-$codes to the instructions in the order they were used in the assembly program, starting from address $0.$