Question: Consider the following MIPS code segment: add r 5 , r 2 , r 1 lw r 3 , 4 ( r 5 ) lw

Consider the following MIPS code segment:
add r5,r2,r1
lw r3,4(r5)
lw r2,0(r2)
or r3,r5,r3
sw r3,0(r5)
How many nops are needed to ensure correct execution of this code on a 5-stage pipelined MIPS processor that does not support forwarding or hazard detection?
How many cycles does it take to run this code on a 5-stage pipelined MIPS processor that does supports forwarding and hazard detection? How many forwards are needed? What is the ALU doing in cycle 6?

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