Consider the four-bit prime (or one) number function you have synthesized in the previous section. You are now asked to develop a test bench for the function.

Here, you need to answer the question, What do you want to test to your code as input? What will you expect at the output?

Use a for loop and the report function to print the output in simulation. You are reminded that the concatenation symbol is the ampersand (&).

*If you're not confident with for loops yet, feel free to omit it.

PREVIOUS QUESTION:

ou are asked to implement a four-bit prime (or one) number function in VHDL. The following entity has been declared.

State the main functionality of this function. What are you expecting at the input and output?

a) Write the architecture description using case statements.

b) Optimise the logical statements in the previous part to implement it with logic gates.

Discuss the use of case statements in comparison to using logic gates. Is one better than the other? Why or why not?

PREVIOUS QUESTION ANSWER:

a)

architecture bhvi of prime is begin process (input) is begin case input is when "0100" | "1000" | "1001" | "1010" | "1100" |"1110" => isprime<='0'; when others => isprime<='1'; end case; end process; end bhvi;

b)

architecture bhvi of prime is begin process (input) is begin isprime<= ((not input(3)) and (not input(2)) and input(1) ) or ((not input(2) and input(1) and input(0)) or ((not input(3) an input(2) and input(0)) or ((not input(1) and input(2) and input(0)); end process; end bhvi;

Implementation using logic gates requires creating the logic circuit and performing calculations.

When using a case statement it is only required to define the behavior of the design.

Which one is better depends on applications. For example logic gates implementation method would be more suitable for small circuits whereas the behaviour model implementation would simplify the job for larger circuits.