Consider the pipelined processor with forwarding shown below CUControl Signals AdderVCN Fm... Fo ata RF SA PCJT MB VCZN o in PCL FIID IDIEX EX/MEM MEM/WB (a) Identify all data hazards in the following code segment by circling each source register that is read before the updated value is written to the register file. ADD RO, R1, R2 LW Rl, 0 (RO) AND R2, RO, R3 SW R2, 4 (RO) SUB R3, R2, RO (b) Highlight using squiggly lines all of the forwarding paths that are used for the code segment. Highlight in the figure above forwarding for the first register that requires forwarding. and in the figure below for the second Control CU-signals AdderVCZN F Fo RF PCJ MW MD PCL IF/ID IDIEX EX/MEM MEMWB