Question: Context: Question 1: Assume that the pipelined architecture does not use separate memories for instructions and data. That is a structural hazard occurs when one

Context:

Question 1: Assume that the pipelined architecture does not use separate memories for instructions and data. That is a structural hazard occurs when one instruction wants to use the data memory (Memory stage) and another instruction wants to use the instruction memory (Fetch stage). Assume also that the hazard is resolved by stalling the instruction that is in the Fetch stage (which means inserting a bubble in the pipeline).

Question:

b. Ignoring any hazard except the above structural hazard, how many cycles would it take to complete the execution of 1000 instructions assuming that 25% of the instructions are lw/sw instructions, 55% are R-type instructions, and 20% are branch instructions?

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