Create a complete analysis table for the circuit of Figure 3-15

 

(a) by finding the logic levels present at each gate output for each of the 32 possible input combinations.

(b) Change each OR to an AND, and each AND to an OR, in Figure   

(c).Then write the expression for the output. 

(d)Complete an analysis table.

Transcribed Image Text:

A A АВС B х 3DАВС (А + D) DA+D A А+D D. A A АВС B х 3DАВС (А + D) DA+D A А+D D.