CS 230 Digital Logic Design Assignment 1 : Lab Work 1 (Week 3) [Total: 2 marks] Objectives: 1. To verify the complement of a function by simulation 2. To be able to manipulate Boolean expressions using truth table. 2. For the following Boolean expression, construct a truth table and draw two (2) circuit diagram (using logic gate and IC in the atanua simulator). Y(A,B,C) = ((A+B)' (B+C)')' Review Questions: 1. If a logic function has five (5) inputs, how many rows must the truth table have to contain all possible states? Justify your