Describe how an instruction is fetched from main memory during the fetch stage of the fetch-execute cycle.

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Question:

Describe how an instruction is fetched from main memory during the fetch stage of the fetch-execute cycle. Your description should cover the use of registers and buses, together with the role of main memory.

2.During the decode and execute stages of the fetch-execute cycle the instruction that is being processed is stored in the CIR. Explain why the instruction could not be processed directly from the MBR.

3.The computer system shown in Figure 1 uses the von Neumann architecture. The Harvard architecture is an alternative to this. 0 1 . 3 Explain why the Harvard architecture is sometimes used in preference to the von Neumann architecture.

4.The Vernam cipher is a more sophisticated cipher system that, under certain circumstances, offers perfect security. State two conditions that must be met for the Vernam cipher to offer perfect security.

5.Both the Caesar and Vernam ciphers are symmetric ciphers, whereas a public and private key encryption system is an asymmetric cipher system. 0 2 . 3 Explain the difference between a symmetric and an asymmetric cipher system.

6.In a particular communications system, eight different voltage levels are used to encode the value of groups of bits. Each voltage level encodes the value of one group of bits.

7.Given that eight different voltage levels are used, how many bits can be in a group that is encoded by a voltage level?

8.The baud rate for this system is 500 baud. What is the system's bit rate?

9.A computer process, X, can only start executing once processes A and B have finished executing and either communication channel C or communication channel D or both are available to use. The states of processes and communication channels can be read using the following Boolean variables: A is set to TRUE if process A has completed and FALSE if process A is still running. B is set to TRUE if process B has completed and FALSE if process B is still running. C is set to TRUE if communication channel C is available and FALSE if it is not available. D is set to TRUE if communication channel D is available and FALSE if it is not available. The Boolean variable X should be set to TRUE if the values of the variables A, B, C and D indicate that process X can start and to FALSE if they indicate that process X cannot start yet.

10.D-type flip-flops can be included in logic circuits. 0 4 . 4 Explain the general purpose of a D-type flip-flop

11.One input to a D-type flip-flop is a data signal. State what the other input to a D-type flip-flop is and what it is used for

12.Discuss the advantages and disadvantages of programming using a high-level language compared to programming using assembly language.

13.In a functional programming language a function named square and three lists a, b and c are defined as follows. square x = x * x a = [1, 3, 5] b = [1, 5, 10, 15] c = [9, 7, 2]

14.What is the list or value that is the result of applying the functions head(tail(tail b))?

15.mapping system, using cars fitted with cameras and WiFi equipment, collected some information that was being transmitted on personal WiFi networks. The company apologised for doing this and an investigation found that a small number of software developers had been responsible for adding this functionality to the mapping system data collection software. In the context of this example, discuss: how it was possible for this data to be collected. what steps the owners of the networks could have taken to prevent the data from being collected. what legal and ethical issues might have arisen as a result of collecting this data. what lessons the company might have learnt from the incident and how their practices might have changed as a result of it. In your answer you will be assessed on your ability to follow a line of reasoning to produce a coherent, relevant and structured response.

16.Two methods of representing and playing music on a computer are sampled sound and MIDI. Sound is being sampled using a 16-bit sample resolution and a sample rate of 20 000 Hz. 1 Hz is one sample per second.