Describe the circuit shown in Figure 13 using behavioral modeling. You will use three process blocks. Write a testbench generating inputs as shown below. Simulate and validate the design in Modelsim using a testbench. D Clock ware-De D CLK D CLK D CLK aruna D renare_62 yah_ futoy /bish Q Q Qa Cb Oc Clock D Qa Ob 8 Figure 13 - Sequential circuit with expected outputs drawn qualitatively and as outputted by Modelsim.