Question: Design a 4 - bit ALU that has two input operands x and y and a 2 - bit control signal s . The ALU

Design a 4-bit ALU that has two input operands x and y and a 2-bit control signal s. The ALU adds x and y if s =0, bitwise OR x and y if s =1, bitwise AND x and y if s =10 and subtracts y from x if s =11. Implement the designed ALU with a structural and dataflow Verilog description.

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