Design a $4-$bit register with $2$ control inputs s$1$ and s$0$; $4$ data inputs in$0,$ in$1,$ in$2$

and in$3$; and $4$ data outputs out$0,$ out$1,$ out$2,$ and out$3.$ When s$1$s$0=00,$ the register

maintains its value. When s$1$s$0=01,$ the register loads the inputs in$0,..,$ in$3.$ When

s$1$s$0=10,$ the register clears itself to $0000.$ When s$1$s$0=11,$ the register complements itself,

for example, $1011$ will become $0100.$