Design a left-shift register similar to that of Figure 1 above. Your register should shift left...

 

 

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Design a left-shift register similar to that of Figure 1 above. Your register should shift left if Sh = 1, load if Sh = 0 and L = 1, and keep its state if Sh = L = 0. a. Draw the circuit using four D flip-flops and four 4-to-1 MUXes. Write at least 1 complete sentence describing what you did and why it works. the solution should be: 23 D D3 0₂ D D₂ Q D D₁ 100 D SI Do Sh Ld Clk FIGURE 12-10 Parallel-in, Parallel-Out Right Shift Register SI Sh L CLK D3 00 | 01 barr 10 11 DQ D₂ SI (Serial In). Sh (Shift Enable). L(Load Enable). Clock 00 DQ Parallel Output Q3 Q2 Q1 20 A D₁ 4-bit Parallel-In, Parallel-Out Shift Register D3 D2 D1 Do Parallel Input (a) Block diagram 00 DQ (b) Implementation using flip-flops and MUXes SO (Serial Out) Do 00 10 20 D Inputs Sh (Shift) 0 0 1 L (Load) 0 1 X Next State Q₂ Q₁+ Q₁ Q3+ Q3 Q₂ D3 D₂ SI Q3 D₁ Q₂ Qo Qo Do Q₁ Action No change Load Right shift Design a left-shift register similar to that of Figure 1 above. Your register should shift left if Sh = 1, load if Sh = 0 and L = 1, and keep its state if Sh = L = 0. a. Draw the circuit using four D flip-flops and four 4-to-1 MUXes. Write at least 1 complete sentence describing what you did and why it works. the solution should be: 23 D D3 0₂ D D₂ Q D D₁ 100 D SI Do Sh Ld Clk FIGURE 12-10 Parallel-in, Parallel-Out Right Shift Register SI Sh L CLK D3 00 | 01 barr 10 11 DQ D₂ SI (Serial In). Sh (Shift Enable). L(Load Enable). Clock 00 DQ Parallel Output Q3 Q2 Q1 20 A D₁ 4-bit Parallel-In, Parallel-Out Shift Register D3 D2 D1 Do Parallel Input (a) Block diagram 00 DQ (b) Implementation using flip-flops and MUXes SO (Serial Out) Do 00 10 20 D Inputs Sh (Shift) 0 0 1 L (Load) 0 1 X Next State Q₂ Q₁+ Q₁ Q3+ Q3 Q₂ D3 D₂ SI Q3 D₁ Q₂ Qo Qo Do Q₁ Action No change Load Right shift