Design a system S that counts people that have entered a store. S increments the count...
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Design a system S that counts people that have entered a store. S increments the count value whenever a single-bit input P changes from 1 to 0, assuming P is a signal coming from some kind of sensor at the entrance, and P stays in 0 for several clock periods before it's changed back to 1. The value is output on a 16-bit output C. Furthermore, the system has a lighting system to indicate the approximate count value to the store manager. A 3-bit register GYR controls three LEDs in green, yellow, and red colors. When the count value is 1-99, GYR=100 to turn on the green LED; when the count value is 100-199, GYR-010 to turn on the yellow LED; when the count value is 200 and above, GYR-001 to turn on the red light. No LED is turned on when there is no customer in the store. Design the system with ONE SINGLE controller. (1) Draw high level state machine (HLSM) (10 points) (2) Draw datapath (10 points) (3) Derive FSM (5 points) Design a system S that counts people that have entered a store. S increments the count value whenever a single-bit input P changes from 1 to 0, assuming P is a signal coming from some kind of sensor at the entrance, and P stays in 0 for several clock periods before it's changed back to 1. The value is output on a 16-bit output C. Furthermore, the system has a lighting system to indicate the approximate count value to the store manager. A 3-bit register GYR controls three LEDs in green, yellow, and red colors. When the count value is 1-99, GYR=100 to turn on the green LED; when the count value is 100-199, GYR-010 to turn on the yellow LED; when the count value is 200 and above, GYR-001 to turn on the red light. No LED is turned on when there is no customer in the store. Design the system with ONE SINGLE controller. (1) Draw high level state machine (HLSM) (10 points) (2) Draw datapath (10 points) (3) Derive FSM (5 points)
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Answer rating: 100% (QA)
1 The highlevel state machine for the system can be represented as follows State 1 Initial state In this state the system is initialized and the count value and GYR register are set to 0 The system wa... View the full answer
Related Book For
Fundamentals Of Digital Logic With Verilog Design
ISBN: 9780073380544
3rd Edition
Authors: Stephen Brown, Zvonko Vranesic
Posted Date:
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