Question: design and produce a VHDL Code for a 4 bit array multiplier to be implemented on Quartus and intel FPGA boards. Instantiate it in terms

design and produce a VHDL Code for a 4bit array multiplier to be implemented on Quartus and intel FPGA boards. Instantiate it in terms of the switches, Use switches SW7-4to represent the number A and switches SW3-0to represent B.The hexadecimal values of A and B are to be displayed on the 7-segment displays HEX2and HEX0,respectively. The result P =A X B is to be displayed on HEX5-4

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