Design, code/draw, and test using the Altera DE0-CV board a 2-digit BCD adder/subtractor. The two BCD digits of the first BCD number (A) are input using SW3 down to SW0 for the least significant BCD digit, and SW7 down to SW4 for the most significant BCD digit and latched when KEY1 is pressed. The two BCD digits of the second BCD number (B) are input using SW3 down to SW0 for the least significant BCD digit and SW7 to SW4 for the most significant BCD digit and latched when KEY0 is pressed. Use SW9 to select between BCD addition (A plus B) and BCD subtraction (A minus B). Display number A using the 7-segment displays HEX5 and HEX4. Display number B using the 7-segment displays HEX3 and HEX2. Display the result of the selected arithmetic operation using the 7-segment displays HEX1 and HEX0. Use LEDR3 to display overflow. Please submit the answer in the form of a compilable VHDL code so i could test it and not on sheets of paper. if you don't have quartus maybe you could use notepad++ to write the code so that I could copy it and compile it. thanks