Do the procedure below. The code should be made in Quartus ll with also using the DE10-Lote board. (Thumbs up will be given for full correct and complete work. Thank you much).

VHDL Implementation of a Hexadecimal-to-Seven-Segment Decoder - Create a hexadecimal-to-seven-segment decoder in VHDL, using the segment patterns in Figure 3.2 as a model. - Create a new project. - Save the VHDL file as drive:I\{desired path\} Iab3lbcd7seglbcd7seg.vhd