Draw the following circuits and explain how they are designed. a) There are two 64K x 8-bit RAM chips available to connect them in a fully expanded 8086 memory circuits. Each chip has a low asserted chip select, CS, a low asserted write enable, WE and a high asserted Output disable, OD, control signals. The two chips should contain the word addressed by 2AF10H in the memory. Show how to connect these two chips as a fully expanded 8086 memory. b) Repeat the problem using 16Kx8bit RAM chips. c) Show how to connect a 16-bit (parallel in / out with a load control) output register to 8086 at location 8 in I/O space Draw the following circuits and explain how they are designed. a) There are two 64K x 8-bit RAM chips available to connect them in a fully expanded 8086 memory circuits. Each chip has a low asserted chip select, CS, a low asserted write enable, WE and a high asserted Output disable, OD, control signals. The two chips should contain the word addressed by 2AF10H in the memory. Show how to connect these two chips as a fully expanded 8086 memory. b) Repeat the problem using 16Kx8bit RAM chips. c) Show how to connect a 16-bit (parallel in / out with a load control) output register to 8086 at location 8 in I/O space