During step one of instruction processing a memory read operation and started to fetch an instruction at location $0$x$46,000.$ however as the instruction is not found in the cash the read operation is delayed and the mFC signal does not become active until the $4$th clock cycle. assume that the delay is handled as described in section $5\mathrm{.}2\mathrm{.}6.$ show the contents of the pC during each of the four clock Cycles of step On and also during step two