Ex 5.1

Ex 5.2

Problem 1 Design of an adder-based 4-bit ALU Design a 4-bit ALU at implements the following function table with 3-bit function select code, f fifo. Meaning Function transfer 0 0 0 OPA. 0 0 1 OPA negate OPA 1 0 1 0 increment OPA 1 0 1 1 decrement 1 0 0 TY OPA OPB add 1 0 1 Y OPA OPB subtract 1 1 0 OPA A OPB logic AND 1 1 1 OPA. OPB logic XOR where OPA x3x2xixo and OPB ysyzyiyo are two 4-bit signed numbers (for arithmetic operations) or unsigned numbers (for logic operations to the inputs of the ALU. The output of the ALU should be Y ysy2yiyo and the four status bits, N, V, Z, C. Method 1: [Similar to Example 5.1] Implement the ALU based on a 4-bit adder using multiplexers at the inputs of the adder. Show ALL your design work and draw the circuit diagram. Method 2: Similar to Example 5.2] Implement the ALU based a 4-bit adder using multiplexers at the output of the adder. For economic reasons, it is required that you use a minimun ogic gates for the design. Show ALL your design work and draw the circuit diagram