Exercise 2.15 For these problems, the table holds some logical operations that are not included in the ARM instruction set. How can these instructions be implemented? a. ANDN r1, r2, r3 // bit-wise AND of r2, !r3 b. XNOR r1, r2, r3 // bit-wise exclusive-NOR 2.15.1 The logical instructions above are not included in the ARM instruction set, but are described above. If the value of r2 is 0x00FFA5A5 and the value of r3 is 0xFFFF003C, what is the result in r1? 2.15.2 The logical instructions above are not included in the ARM instruction set, but can be synthesized using one or more ARM assembly instructions. Provide a minimal set of ARM instructions that may be used in place of the instructions in the table above. 2.15.3 For your sequence of instructions in 2.15.2 show the bit-level representation of each instruction. Various C-level logical statements are shown in the table below. In this exercise, you will be asked to evaluate the statements and implement these C statements using ARM assembly instructions. Assume that the base address for the array C is in register R2, and values for integers a and b are in registers R3 and R4. a. a = b & C[0]; b. a = (b=