Exercise $3$: Creating a logic block $(45$min

This exercise will design and test a single$-$bit ALU logic block. An ALU $($arithmetic logic unit$)$ is a key circuit block within a microcontroller or computer central processing unit $($CPU$).$ As the name ALU implies, it is composed of two main functional blocks, and arithmetic block $($which you will design in a later lab$)$ and a logic block, which you will design in this exercise. Logic blocks are responsible for implementing all logic functions $($NOT$,$ AND, etc.$)$ of a CPU.

Task A: Design plan for a $4-$function ALU Logic Block

Sketch a planning schematic $($using any means you choose; e$.$g$.,$ on paper or a tablet$)$ for a $2$input Logic Block circuit that meets the requirements below. Use standard symbols for logic gates and a $4$:$1$ MUX. Paste an image of your Logic Block schematic in the designated area of the Worksheet. Hint: name all internal $($non$-$port$)$ signals; you'll need to add these as wires.

Assume the Logic Block has the following ports: Iwo data inputs, a and $b,$ two select inputs, s$1$ and $s0$ and one output, $y.$

The Logic Block must implement four logic functions for data inputs a and b$,$ AND, OR$,$ XOR, and INV $($of input a$).$

A $4$:$1$ MUX circuit $($from Exercise $2)$ should be used to choose which of the four logic function outputs go to the Logic Block output. Recall the two select inputs $(s1,s0)$ choose which input goes to the output of the $4$:$\frac{1}{M}Ux.$ Thus, the MUX select lines become Logic Block control signals, determining which logic function will be implemented for any given select combination.

In order to keep the function selection code the same for all students, please assign function selection according to the table below. $($Note: this selection code will become