Explain fully why we do not use the obvious solution of sign-magnitude rather than twos complement.5.2 (5pts) Explain fully why we implement circuits using NAND/NOR rather than AND/OR. 5.3 (5pts) I discussed the system diagram and fetch/decode/execute diagram and explained the potential bottlenecks to performance that will require the need for cache (which we will study in the next section). Considering those two diagrams, explain any performance bottlenecks that will limit system performance.