Question: Explain the Hardwired control unit block diagram in detail, also configure the designed hardwired control unit for the following sequence. Write Verilog HDL for the

Explain the Hardwired control unit block diagram in detail, also configure the designed hardwired control unit for the following sequence.
Write Verilog HDL for the designed circuit
\table[[Control word,Control action,@what time to generate,],[000,add,sub,@1ms],[010,mul,@1.5ms,],[100,MEM EN,@2ms,],[110,,,]]
Explain the Hardwired control unit block diagram

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