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arefully study the following logic circuit (Universal Register) and answer the next 3 questions. if Reset= 1, S150 = 11, D3D2D100=1010, Q3Q2Q1Q0 = 1111, at the next negative edge of the clock, then binary output at Q3Q2Q1QOwillbe Blank 1. If Reset=0, 5150 = 00, D3D2D100= 1010, Q3Q2Q1Q0 = 1111, at the next negative-edge of the clock, then binary output at 03Q2Q1QOwillbe Blank 2. If Reset= 1, 5150 = 00, D3D2D100=1100, Q3Q2Q1Q0 = 1111, at the next negative-edge of the clock, then binary . output at Q3Q2Q1QOwillbe Blank 3. Parallel Inputs D D2 D D. Right Serial Input Left Serial Input 3210 3210 3210 3210 D D D D IR Q ror a BRO IRO Clock Reset e 02 Q Q Parallel Outputs