Carefully study the following logic circuit (Universal Register) and answer the next 3 questions. If Reset= 1, 5150 = 11, D3D2D1D0= 1010, Q3Q2Q1Q0 = 1111, at the next negative-edge of the clock, then binary output at Q3Q2Q1QOwillbe Blank 1. If Reset= 0, 150 = 00, D3D2D1D0= 1010, Q3Q2Q1Q0 = 1111, at the next negative edge of the clock, then binary output at Q3Q2Q1 QOwillbe Blank 2. If Reset= 1, S150 = 00, D3D2D1D0= 1100, Q3Q2Q1Q0 = 1111, at the next negative edge of the clock, then binary output at Q3Q2Q1 QOwillbe Blank 3. Parallel Inputs D3 D2 D D. Left Right Serial Input Serial Input 3 2 1 0 4 S 3210 132104 3210 2 D D D R Q R Q RQ Q Clock Reset i Q3 Q2 Q lo Parallel Outputs