Question: For the following MIPS code, assume no forwarding, but all branches are perfectly predicted, and there is only one memory for both instructions and data.

 For the following MIPS code, assume no forwarding, but all branches

For the following MIPS code, assume no forwarding, but all branches are perfectly predicted, and there is only one memory for both instructions and data. Structural hazards are solved in favor of the instruction that accesses data. No other changes were made to the datapath. lw $S1, 40($56) add $S4, $S1, $S2 sw $S6, 52($S2) add $S2, $S6, $S3 add $S3, $S4, $S4 add $S3, $S5, $S4 What is the total number of execution clock cycles for this code? Hint: first instruction needs 5 cycles

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