For this part you are required to design a sequen- tial circuit that emulates parts of an instruction interpretation cycle. The machine has a col- lection of that achieves the following behavior (all data inputs/outputs of this circuit are single bits): Inputs: indirect, program-check, C1, clock Outputs: fetch, decode, indirect, execute, trap, S1, S2 States: fetch, decode, indirect, execute, trap State Transitions: All state transitions oc- cur with the clock signal and each main state (fetch, decode, indirect, execute, trap) cy- cles through two steps coincident with the clock (so the machine transitions to the fetch state at si (written fetch/S1) and them moves to the fetch state at S2 where it transitions as per the informal specification given below: fetch S1. S2. goto decode/S1 decode Si. S2. if indirect then goto indirect/Si else goto execute/Si indirect Si. S2. goto execute/S1 execute S1. S2. if program-check then goto trap/S1 else goto fetch/S1 trap S1. S2. goto fetch/Si Note however, the following exceptions: If condition C1 is true at the end of fetch then the machine transitions back to state fetch/S1. For this part you are required to design a sequen- tial circuit that emulates parts of an instruction interpretation cycle. The machine has a col- lection of that achieves the following behavior (all data inputs/outputs of this circuit are single bits): Inputs: indirect, program-check, C1, clock Outputs: fetch, decode, indirect, execute, trap, S1, S2 States: fetch, decode, indirect, execute, trap State Transitions: All state transitions oc- cur with the clock signal and each main state (fetch, decode, indirect, execute, trap) cy- cles through two steps coincident with the clock (so the machine transitions to the fetch state at si (written fetch/S1) and them moves to the fetch state at S2 where it transitions as per the informal specification given below: fetch S1. S2. goto decode/S1 decode Si. S2. if indirect then goto indirect/Si else goto execute/Si indirect Si. S2. goto execute/S1 execute S1. S2. if program-check then goto trap/S1 else goto fetch/S1 trap S1. S2. goto fetch/Si Note however, the following exceptions: If condition C1 is true at the end of fetch then the machine transitions back to state fetch/S1